ASIC Physical Design, Sr Engineer
Synopsys | |
United States, Massachusetts, Boxborough | |
April 24, 2024 | |
Physical Design Engineer 46597BR USA - Massachusetts - Boxborough, USA - USA Job Description and Requirements The Digital Implementation team is seeking a highly motivated and innovative engineer who be part of the timing team working on timing flows, constraints, analysis & debug of timing issues that will enable physical design activities and will be responsible for physical design implementation of the Mixed-Signal DDR PHY IPs in various cutting edge process technologies. In this role you will work on a variety of advanced DDR PHY developments including the latest standards in LP5x and DDR5. The position offers an excellent opportunity to work with an expert team of digital and mixed-signal engineers.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. The base salary range across the U.S. for this role is between $97,000.00-$145,000.00. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request. #LI-AS4 Job Category Engineering Country United States Job Subcategory ASIC Physical Design Hire Type Employee Base Salary Range $97,000-145,000 |